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ZXLB1600 LCD BIAS BOOST CONVERTER
DESCRIPTION The ZXLB1600 DC/DC boost converter accepts an input voltage of between 1.6V and 5.5V and provides an adjustable output voltage of up to 28V for LCD backplane bias. The device contains the output switch and a second switch to isolate the coil from the input and provide true isolation in shutdown mode. The output can be adjusted by means of an externally applied dc voltage, or PWM control signal and can supply typically 10mA of output current at maximum output voltage. Higher current is available at lower output voltages. The input voltage range accepts a number of battery solutions, including dual dry cell and single Li-Ion cells and PFM operation mode allows the output to be regulated with high efficiency under light or no load conditions. The switching frequency range permits the use of miniature surface mount inductors. The voltage control range can be modified, if required, by external resistors. A low battery comparator is provided to indicate when the input voltage has fallen to within 2% of a preset threshold. FEATURES * Wide input voltage range: 1.6 to 5.5V * Adjustable output voltage up to 28V using PWM or analog control voltage * True shutdown (output isolated from input) * Internal output switch and current sense * Low quiescent current: (75A max) * 5A (max) shutdown current (including low battery comparator) * Up to 500kHz switching frequency (PFM) * 85% efficiency * Low battery flag * Small MSOP10 package * Low external component count APPLICATIONS * PDAs * Mobile Phones * Digital Cameras * Portable Internet Appliances * Notebook and Palmtop computers ORDERING INFORMATION DEVICE DEVICE DESCRIPTION ZXLB1600X10 Boost converter for LCD bias in MSOP10 TEMPERATURE RANGE 0 C to 70 C PART MARK ZXLB1600 TAPING OPTIONS TA, TC
TA reels 500 devices, TC reels 2500 devices DRAFT ISSUE J January 2002
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ABSOLUTE MAXIMUM RATINGS (Voltages to GND unless otherwise stated) Output Voltage Input Voltage Switch output current Power Dissipation Operating Temperature Storage Temperature Junction Temperature 30V 7V 500mA 800mW 0 to 70C -55 to 125C 150C
ELECTRICAL CHARACTERISTICS: Test conditions unless otherwise stated: VIN=3.0V, TAMB=25C Symbol Parameter
VIN IIN Input voltage Supply current Shutdown Quiescent `On' resistance Leakage current Switch peak current limit `On' resistance Switch leakage current Controller output VOUT IOUT VLNR VLDR fLX TON TOFF Output voltage range Maximum output current Line regulation Load regulation Operating frequency Output `ON' time Output `OFF' time Efficiency Lx = 22H, VOUT = 28V IOUT = 1mA, 2V < VIN <5.5V VOUT = 28V, 100uA < IOUT < 5mA LX output low LX output off VOUT = 28V, IOUT = 1mA, L=22H VIN 5 29 10 0.1 0.01 200 85 V mA %/V %/mA kHz s s %
Conditions
General
Min Typ Max Units
1.6 3 3 0.8 5.5 5 75 2 1 0.5 2 1 V A A A A A
RISO IISO ILX RLX ILX(leak)
VEN = 0V, VIN =5.5V (Note 1) VEN = VIN, IOUT = 0V Isolating switch VEN = VIN VEN = 0V LX Switch 0.2
0.3 1.0
500 10
1
Note:1 Shutdown current includes 3A (max) for the battery low comparator, which remains active in shutdown
mode
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Test conditions unless otherwise stated: VIN=3.0V, TAMB=25C Symbol Parameter
VADJ (NOM) VADJ I ADJ VSENSE T/T fLPF ALPF VENL VENH IENL IENH IBLQ VBLT VBTOL VBLHYS VLBT VLBT (max) IBLOL VBLOL IBLOH VBLOH
Conditions
Min Typ Max Units
1.23 VADJ
(NOM)
Output Voltage control by dc voltage applied to `ADJ' pin Internal reference voltage `ADJ' pin floating, `EN'= VIN External overdrive voltage range 0.5 on `ADJ' pin for output voltage control Input current 0.5V V A V % kHz dB
-10 29 100 4 52.5 0.4 Vin -100 100 3 2 +/-2 20 1.21 Vin0.5 1 0.4 2 29
V V nA nA A V % mV V V mA V A V
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PIN DESCRIPTION
Pin #
1 2 3 4 5 6 7 8 9 10 BLOCK DIAGRAM
Name ADJ EN VIN SW SENSE LX LBF GND FB LBT
Description Internal or external reference voltage Enable input (active high) Also used to adjust output voltage by PWM signal Input voltage Output of high side PMOS isolation switch Output voltage sense Output of NMOS switch Low Battery Flag output: open drain (active low for low battery voltage) Remains active when EN is high Ground Voltage Feedback pin for output (threshold 1.23V) Low Battery flag Threshold adjust input (threshold 1.21V)
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Device Description The device is a flyback boost regulator, working in discontinuous mode. Device Operation With reference to the chip block diagram and typical application circuit: Control loop operation When `EN' is high, the control circuits become active. The high side of the coil is connected to the input via a large PMOS isolating switch (MP) and the low side to ground via a NMOS transistor (MN). The current in the coil is allowed to build up to an internally defined level (nominally 300mA) before MN is turned off. The energy stored in the coil is then transferred to the output capacitor (C1) via a Schottky diode (SD). The output voltage is sensed at pin `SENSE' by internal resistors R1 and R2 (which may be shunted externally at pin `FB') and compared to a reference voltage (1.23V nominal). A comparator senses when the output voltage is above that set by the reference and its output is used to control the `off' time of the output switch. The control loop is self-oscillating, producing fixed pulses of 10us maximum width, at a frequency that varies in proportion to the output load current. This mode of operation is known as Pulse Frequency Modulation (PFM) Setting output voltage The output voltage is equal to the voltage present on the `ADJ' pin of the device multiplied by the internal resistor network factor (R1+R2)/R1. The ADJ pin is connected to the internal reference voltage of value VADJ(NOM), and by default will give a nominal output of 28V. However, if required, the ADJ pin may be overdriven with an external dc voltage, in order to adjust the output voltage to a value lower than the default value. The reference voltage on the ADJ pin is switched into a low pass filter circuit when the EN pin is high and the output of this filter drives the comparator within the control loop. By varying the duty cycle of the EN signal, the control loop will see a voltage, which has an average value equal to the duty cycle multiplied by the voltage present on the ADJ pin. This provides an alternative means of adjusting the output voltage. It also allows the device to be both turned on and adjusted with a single signal at the `EN' pin. The output voltage during this mode of operation will be VADJ x (R1+R2)/R1 x duty cycle. To reduce standby current consumption, the internal reference is turned off when no signal is present on the `EN' pin Further control over output voltage during either mode of operation is possible by shunting the internal resistor network comprising R1 and R2 by means of external resistors connected to the SENSE and FB pins. Low Battery detection A comparator driving an open drain NMOS output transistor performs the low battery flag function. The detection threshold (battery voltage falling) is set internally to 2V nominal, but this can be changed by shunting the internal potential divider with two external resistors at pin 'LBT'. Operation is such that the output transistor will be turned on when the battery voltage falls below the detection threshold. A small amount (nominal 20mV) of hysteresis is provided to aid clean switching. The low battery detect circuit remains active when `EN' is low. DRAFT ISSUE J January 2002
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TYPICAL APPLICATION CIRCUIT
22uH ZXLB1600
VIN SW
LX
ZHCS500
OUTPUT
SD
SENSE LBF EN LBT ADJ GND FB
C1
APPLICATION NOTES Increased efficiency If the isolation of the coil from the supply is not needed, the SW pin can be connected to VIN to improve efficiency. This prevents power loss in the internal high-side PMOS switch. Low Battery Flag Output, LBF This is an open drain output that switches low when the battery voltage falls below the detection threshold. An external pull-up resistor can be connected to this pin to allow it to interface to any voltage up to a maximum of 29V. Layout considerations The FB and LBT pins are high impedance inputs, so PCB track lengths to these should be kept as short as possible. A small capacitor (~100pF) can be connected from the FB pin to the output to reduce output ripple and noise. Also a capacitor can be connected from the LBT pin to ground to minimise noise pickup into the low battery comparator if required. DRAFT ISSUE J January 2002
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PACKAGE OUTLINE
Zetex plc. Fields New Road, Chadderton, Oldham, OL9 8NP,United Kingdom Telephone: (44) 161 622 4422 (Sales), (44) 161 622 4444 (General Enquiries) Fax: (44) 161 622 442 Zetex GmbH Streitfieldstrae 19 D-81673 Munchen Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 Zetex Inc. 47 Mall Drive, Unit 4 Commack NY 11725 USA Telephone: (631) 543-7100 Fax: (631) 864-7630 Zetex (Asia) Ltd. 3701-04 Metroplaza, Tower 1 Hing Fong Road, Kwai Fong, Hong Kong Telephone: (852) 26100 611 Fax: (852) 24250 494 These are supported by agents and distributors in major countries world-wide (c) Zetex plc 2000 http://www.zetex.com
This publication is issued to provide outline information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contact or be regarded as a representation relating to the products or services concerned. The company reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service.
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